Semiconductor devices and methods to form a contact in a semiconductor device

ABSTRACT

Semiconductor devices and methods to form a contact of a semiconductor device are disclosed. An example method to form a contact includes forming an insulating layer on a substrate; etching the insulating layer to form a contact hole; depositing a silicon layer on sidewalls and an undersurface of the contact hole; forming a silicon spacer on the sidewalls of the contact hole by etching the silicon layer; transforming the silicon spacer to a silicon nitride spacer; depositing a diffusion barrier on the silicon nitride spacer; and filling the contact hole with tungsten. Because the silicon nitride spacer formed on the sidewalls of the contact hole can serve as a leakage current blocking layer, the yield and the reliability of the semiconductor devices manufactured by this example process are enhanced.

RELATED APPLICATION

This patent arises from a divisional application of U.S. application Ser. No. 10/721,978, which was filed on Nov. 25, 2003.

FIELD OF THE DISCLOSURE

This disclosure relates generally to semiconductor devices, and, more particularly, to methods to form a contact of a semiconductor device.

BACKGROUND

As is well known, the demand for semiconductor devices has been increasing. Various types of contacts, (e.g., contact holes), have been recently developed for semiconductor devices. The contact hole is usually filled with a conductive metal, (e.g., tungsten), to thereby electrically connect a silicon substrate with a wiring board.

FIG. 1 is a cross-sectional view of a contact of a conventional semiconductor device. A conventional method for forming the contact of the semiconductor device will now be described:

An insulating layer is formed on a substrate 1. The insulating layer is then etched to thereby form a contact hole 2. An active region of the substrate 1 is exposed through the contact hole 2. A tungsten diffusion barrier 3, (e.g., a CVD TiN (chemical vapor deposition titanium nitride) layer), is deposited on the sidewalls and an undersurface of the contact hole 2. Thereafter, the contact hole 2 is filled with tungsten by depositing tungsten on the tungsten diffusion barrier 3 to thereby form a tungsten plug 4. Subsequently, an Al line 5 is deposited on the tungsten plug 4.

The above-mentioned deposition of the CVD TiN layer is usually executed by a MOCVD (metal-organic chemical vapor deposition) method. As a result, many impure atoms, (e.g., C, N, O and the like), are left in the CVD TiN layer. Leakage current can flow through these impure atoms. To reduce the leakage current, attributes of the CVD TiN layer may be enhanced by performing an N₂/H₂ plasma treatment. That is, the impure atoms in the CVD TiN layer can be reduced by the N₂/H₂ plasma treatment.

However, because of the anisotropic property of the N₂/H₂ plasma treatment, the sidewalls of the contact hole 2 cannot be treated with the N₂/H₂ plasma treatment. Since the attributes of the sidewalls of the contact hole 2 are not enhanced by the N₂/H₂ plasma treatment, the leakage current may flow through the sidewalls. Therefore, the yield and the reliability of the manufactured semiconductor devices are degraded.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a cross-sectional view of a contact of a conventional semiconductor device.

FIGS. 2A to 2E illustrate an example method for forming a contact of an example semiconductor device.

DETAILED DESCRIPTION

FIGS. 2A to 2E are cross-sectional views of an example contact of an example semiconductor device at various formation stages. As shown in FIG. 2A, an insulating layer 9 is first formed on a substrate 1. The insulating layer 9 is then etched to thereby form a contact hole 2 with a high aspect ratio. An active region of the substrate 1 is exposed through the contact hole 2.

As shown in FIG. 2A, a silicon layer 6 is deposited on the sidewalls and an undersurface of the contact hole 2 and on the insulating layer 9 with a thickness of, for example, about 50˜200 Å in a furnace. At the time of depositing the silicon layer 6, it is preferable that temperature range and the pressure range in the furnace are about 500˜700° C. and about 0.1˜1 Torr, respectively. It is also preferred that SiH₄ gas be injected into the furnace at the time of depositing the silicon layer at a rate of about 1˜5 slm (standard liters per minute).

Thereafter, as shown in FIG. 2B, the silicon layer 6 is anisotropically etched in a chamber in a Cl₂/HBr gas atmosphere to thereby form a Si spacer 7 only on the sidewalls of the contact hole 2. The pressure range in the chamber is preferably, for example, about 1˜50 mTorr during this etching process. Preferably the rates of the amounts of Cl₂ and HBr injected into the chamber range are about 10˜50 sccm (standard cubic centimeters per minute) and about 100˜300 sccm, respectively.

Thereafter, as shown in FIG. 2C, the Si spacer 7 undergoes a NH₃ plasma treatment in the chamber by using an ICP (inductive coupled plasma) scheme, to thereby transform the Si spacer 7 into a SiN spacer 8 on the sidewalls of the contact hole 2, (i.e., to nitrify the Si spacer 7). It is preferable that the pressure range and the rate of injection of the NH₃ gas atmosphere in the chamber are about 1˜100 mTorr and about 10˜100 sccm, respectively. Leakage current flowing through the sidewalls of the contact hole 2 can be greatly reduced by forming the SiN spacer 8 on the sidewalls of the contact hole 2.

It is also possible that, instead of the NH₃ plasma treatment, the SiN spacer 8 can be formed by annealing the SiN spacer 7 through a N₂ or NH₃ gas atmosphere heat treatment. It is preferable that the rate of N₂ or NH₃ gas injected into the chamber is about 5˜20 slm and the temperature range in the chamber is about 600˜800° C.

Thereafter, as shown in FIG. 2D, a CVD TiN layer 3 is deposited on the SiN spacer 8. The SiN spacer 8 serves as a tungsten diffusion barrier. It is preferable that the thickness of the deposited CVD TiN layer 3 is about 25˜150 Å. The deposition of the CVD TiN layer 3 on the sidewalls of the contact hole 2 is executed by a MOCVD method. As a result, many impure atoms such as C, N, O and the like are contained in the sidewalls. To prevent leakage current from flowing through the impure atoms, attributes of the CVD TiN layer 3 may be enhanced by N₂/H₂ plasma treatment. Although, in the course of the N₂/H₂ plasma treatment, the sidewalls of the contact hole 2 cannot be treated because of anisotropic property of the N₂/H₂ plasma treatment, leakage current is not caused by the impure atoms, because the SiN spacer 8 formed on the sidewalls of the contact hole 2 serves as a leakage current blocking layer. Therefore, the yield and the reliability of the manufactured semiconductor devices are enhanced.

As shown in FIG. 2E, tungsten is deposited on the CVD TiN layer 3 so that the contact hole 2 is filled with tungsten. Thereafter, the tungsten outside of the contact hole 2 is removed by a tungsten CMP (chemical mechanical polishing) process, to thereby form a tungsten plug 4 in the contact hole 2. An Al line 5 is then deposited on the tungsten plug 4.

From the foregoing, persons of ordinary skill in the art will appreciate that example semiconductor devices having a contact hole with a leakage current blocking layer and example methods for forming a contact with a SiN (silicon nitride) layer serving as a leakage current blocking layer deposited on sidewalls of the contact hole have been disclosed.

An example method for forming a contact includes: forming an insulating layer on a substrate; etching the insulating layer to form a contact hole; depositing a silicon layer on sidewalls and an undersurface of the contact hole; forming a silicon spacer on the sidewalls of the contact hole by etching the silicon layer anisotropically in a chamber; transforming the silicon spacer into a silicon nitride spacer by plasma treatment in the chamber; depositing a diffusion barrier on the silicon nitride spacer; and filling the contact hole with tungsten.

An example method for forming a contact includes: forming an insulating layer on a substrate; etching the insulating layer to form a contact hole; depositing a silicon layer on sidewalls and an undersurface of the contact hole; forming a silicon spacer on the sidewalls of the contact hole by etching the silicon layer anisotropically in a chamber; forming a silicon nitride spacer by annealing the silicon spacer through a N₂ or NH₃ gas atmosphere heat treatment in the chamber; depositing a diffusion barrier on the silicon nitride spacer; and filling the contact hole with tungsten.

Although certain example methods and apparatus have been described herein, the scope of coverage of this patent is not limited thereto. On the contrary, this patent covers all methods, apparatus and articles of manufacture fairly falling within the scope of the appended claims either literally or under the doctrine of equivalents. 

1. A semiconductor device comprising: a silicon substrate; an insulating layer formed on the silicon substrate, the insulating layer including a contact hole formed therein; a silicon nitride spacer for blocking leakage current on sidewalls of the contact hole; a conductive material diffusion barrier layer on the silicon nitride spacer and an undersurface of the contact hole; and a conductive metal deposited on the diffusion barrier layer in the contact hole to thereby fill the contact hole.
 2. A semiconductor device as defined in claim 1, wherein the silicon nitride spacer is formed by nitrifying a silicon spacer.
 3. A semiconductor device as defined in claim 2, wherein the silicon nitride spacer is formed by NH₃ plasma treating a silicon spacer.
 4. A semiconductor device as defined in claim 2, wherein the silicon nitride spacer is formed by annealing a silicon spacer through a N₂ or NH₃ gas atmosphere heat treatment.
 5. A semiconductor device as defined in claim 1, wherein the conductive material diffusion barrier layer is a CVD TiN layer.
 6. A semiconductor device as defined in claim 1, wherein the conductive material diffusion barrier layer has a thickness of at least 25-150 Å.
 7. A semiconductor device as defined in claim 1, wherein the silicon nitride spacer has a thickness of about 50-200 Å.
 8. A semiconductor device as defined in claim 1, wherein the conductive metal includes tungsten. 